Pull-Up Resistor Calculator

How to use this calculator

Enter the numbers from your parts' datasheets in three groups. When the line is pulled low: the supply voltage VCC, the driver's maximum low-level output voltage VOL(max), and its guaranteed sink current IOL(max) — these set the smallest resistor you may use. When the line idles high: the receivers' minimum input-high voltage VIH(min) and their high-state leakage current IIH per input, plus how many inputs sit in parallel — these set the largest resistor you may use. The two optional fields add an edge-speed constraint: with a line capacitance C and a maximum rise time t, the calculator also computes the largest R that charges the line to 95% within t (R ≤ t/3C). The default values (5 V / 0.4 V / 8 mA / 2.0 V / 100 µA × 1) are representative textbook figures for a 5 V TTL-style driver feeding one CMOS input, and they produce the window 575 Ω – 30 kΩ with a recommended 4.3 kΩ.

The result panel reports the window as the large "min – max" line, then each bound with its reason: the sink-current limit (R_min = (VCC − VOL)/IOL), the leakage limit (R_max = (VCC − VIH)/(IIH × n)), and, when both optional fields are filled, the rise-time limit. The recommended value is the E24 standard part closest to the geometric middle of the effective window — a spot where neither constraint is stressed. Two more rows follow when applicable: the edge speed at the recommended value (3RC, the ≈95% rise time) and the sink current the driver must supply through that resistor, so you can confirm it stays far below IOL(max). The circuit drawing tracks every input.

A few practical notes. All currents are peak/guaranteed values from the datasheet — use the worst-case figures, not typicals, or your window will be optimistic exactly when it matters (hot day, slow corner). If you only care about one direction of the constraint, leave the other group's fields at plausible values; the calculator always reports both bounds. For a pull-down instead of a pull-up, mirror the same logic with ground and VCC swapped: the high driver's sourcing capability sets R_min = VOH(min)/IOH(max), and the inputs' low-state leakage IIL sets R_max = VIL(max)/(IIL × n). The window idea is identical — only the rails change.

The table is for orientation only: thresholds and currents differ between parts, batches and supply voltages. Your specific datasheet's I/O characteristics table governs every real design.

What it means in a real circuit

A pull-up resistor defines the idle state of a line that nothing else is driving. Open-drain and open-collector outputs — used for I²C, bus sharing, level translation and simple sensor interfaces — can only connect their pin to ground; they have no internal path to the supply rail. High-impedance inputs (a microcontroller pin set to input mode) are even more passive: just a gate with leakage current and a few picofarads of capacitance. Left alone, such a line floats at whatever stray charge, ESD residue or crosstalk leaves behind — an undefined logic level that may read differently on every power-up. The pull-up ties the line to VCC through a resistor, so "nobody driving" now means a clean HIGH, and any driver can still drag it low by sinking current through R: I = (VCC − VOL)/R.

The sizing problem has two physical limits, which is why the answer is a window rather than a single number. Make R too small and the low driver must sink more current than its datasheet guarantees: its output voltage rises above VOL(max), possibly above the receivers' VIL limit (a "low" that some inputs read as high), and the driver dissipates I²R-equivalent heat it was not sized for. Make R too large and two things go wrong at once: the idle line sags under leakage current — every parallel input draws IIH through the resistor, dropping VCC by IIH·n·R — and the RC time constant τ = R·C slows every rising edge, because charging the line's capacitance through a large resistor is slow. The window between these limits is where the circuit works at every corner of temperature, supply and process variation.

In practice this is one of the most frequently chosen values in digital design: 4.7 kΩ appears on pull-ups everywhere because it sits comfortably inside most 5 V windows — small enough that leakage sag and edge speed are a non-issue, large enough that a low driver sinks about a milliamp instead of ten. Modern low-leakage CMOS inputs push the comfortable range upward (10 kΩ to 100 kΩ for battery systems), while fast buses with many parallel receivers and long traces push it downward (below 2 kΩ). The same math, mirrored, sizes pull-downs — which is how active-low reset lines get a guaranteed LOW at power-up before any software runs.

Definitions

A pull-up resistor connects a signal line to the positive supply so that an un-driven line reads HIGH; a pull-down does the same to ground for an idle LOW. The key thresholds: VOL(max) is the highest voltage a driver's "low" output is guaranteed not to exceed while sinking its rated current; VIH(min) is the lowest voltage an input is guaranteed to accept as "high"; VIL(max) is the highest voltage still read as "low". IOL(max) is the current a low output can sink while staying within VOL(max); IIH is the tiny current that leaks into an input pin when the line is high (microamps or less for CMOS). The RC time constant τ = R·C sets how fast the line charges: about 3τ to reach 95% of the final value.

Design tips

Size against the weakest driver on the line, not the strongest: a bus with one 8 mA part and one 2 mA part must be sized for 2 mA, or that second driver will violate VOL the moment it pulls low. Sum IIH over every parallel input — ten inputs at 20 µA each are one input at 200 µA — and remember leakage rises with temperature, so a window that is tight at room temperature gets tighter in a hot enclosure; keeping the recommended value well inside (rather than at the edge of) your window buys exactly that margin. And check the rise-time limit against your bus standard before you commit: I²C specifies maximum rise times per speed grade, and a pull-up chosen purely for leakage will fail the timing spec on a capacitive board.

Place the pull-up close to the pin it serves — at the far end of a long trace it rings and slows down. For mechanical switch debouncing, the classic 10 kΩ pull-up with a 100 nF capacitor at the input gives τ = 1 ms, filtering contact bounce (typically under 10 ms) while keeping edges fast enough for any microcontroller. And when the line crosses between voltage domains (a 5 V sensor talking to a 3.3 V MCU), do not simply pull up to the higher rail — use a level shifter or a divider-based translation, because a 5 V idle on a 3.3 V pin exceeds its absolute maximum rating.

Common mistakes

The most dangerous error is pulling a line up to a rail higher than the receiving pin's supply: wiring a 5 V pull-up onto a 3.3 V MCU input puts 5 V on a pin whose absolute maximum is about 3.6 V — guaranteed long-term damage even when "nothing is happening". The second classic is choosing R by habit (4.7 kΩ everywhere) without checking the window: on a bus with eight parallel inputs and 300 pF of trace capacitance, 4.7 kΩ may fail the rise-time spec, while on a battery system it wastes milliwatts per line for no benefit. A subtler mistake is sizing for one driver when several can pull the line low — the weakest sink current governs, and mixing a strong part with a weak one means the weak part silently violates VOL whenever it drives.

Also avoid assuming the pull-up "helps" the signal: it adds no gain, no noise immunity beyond defining the idle state — if your line is noisy while driven, the problem is in the driver or the routing, not the missing 4.7 kΩ. And do not skip the capacitance check on long traces: a 20 cm bus with ten devices can easily hold 200 pF or more, which at 10 kΩ gives τ = 2 µs — fine for a status line, fatal for a clock.

Component-selection advice

The power involved is tiny — at the recommended value the pull-up dissipates VCC²/R only while the line is low (5.8 mW for 4.3 kΩ at 5 V) — so any standard ¼ W part in any package works; pick by location, not rating. Prefer a small SMD (0402 or 0603) placed within a centimetre of the pin, with the value from inside your computed window rather than the nearest habit. For I²C lines, follow the bus specification's rise-time formula instead of guessing: the standard-mode (100 kHz) spec with typical board capacitance lands near 4.7 kΩ at 5 V and about 2.2–4.7 kΩ at 3.3 V, while fast-mode needs lower values. When in doubt between two E24 values inside the window, take the larger one — it saves leakage power and edge speed is usually the constraint with headroom.

Limitations of this calculation

The model is static: one low driver at a time, DC leakage currents, ideal wires. It does not model bus contention (two drivers fighting), AC coupling, ESD paths or the inductance of long traces that shapes fast edges; and IIH is temperature-dependent — it rises as the board heats — so an R_max computed at room temperature is optimistic in a hot enclosure. Keep the chosen value comfortably inside the window (the geometric-middle recommendation already does this) to absorb that drift. The rise-time estimate uses the simple 3RC approximation for charging through a resistor into a capacitance; real edges with threshold-dependent leakage differ by tens of percent, so treat the number as an order-of-magnitude design aid, not a guarantee.

Finally, datasheet values are guaranteed at specified conditions (supply voltage, temperature) that your circuit must actually meet: a VOL(max) quoted at VCC = 4.5 V is not valid if your rail sags to 4.2 V under load. Where the application is safety-relevant or high-speed, verify the final choice with simulation or measurement — this calculator gets you to the right neighbourhood, the datasheet and the oscilloscope make it certain.

Example use cases

Debouncing a mechanical switch on a microcontroller input. Wire the switch between the pin and ground, add a 10 kΩ pull-up to VCC and a 100 nF capacitor from the pin to ground. The RC time constant is τ = 10 kΩ × 100 nF = 1 ms, so contact bounce (typically a few milliseconds of chatter) is averaged out while clean edges still form in well under 5 ms. With the switch open the pin reads a solid HIGH; closed, it reads LOW through the switch — and the pull-up never carries more than VCC/10 kΩ = 0.5 mA even if the switch sticks closed.

Bringing an open-drain sensor output into a microcontroller. A flow sensor with a 5 V open-drain output (VOL ≤ 0.4 V at IOL = 8 mA) feeds a MCU input with VIH(min) = 2.0 V and IIH = 100 µA. The window is R_min = (5 − 0.4)/8 mA = 575 Ω up to R_max = (5 ‒ 2.0)/100 µA = 30 kΩ; a standard 4.7 kΩ sits comfortably inside, and when the sensor pulls low it sinks only (5 − 0.4)/4.7 kΩ ≈ 0.98 mA — one-eighth of its rated capability, so the output stays a clean LOW at every temperature corner.